Our Probe Card Technology

   Since founded in 1999, ProbeAce has been researching a unique and novel methodology for realizing a next-generation probe card. The semiconductor industry has been eager for a next-generation probe card for more than 10 years. However, a conclusive method has not been realized in spite of an urgent issue. In order to develop the advanced probe card, ProbeAce has proposed a new design method, termed as the AMMECS (Advanced Micro-Mechanical・Electrical・Chemical System).


Background of probe card technology and test market

    A probe card is an interface between a semiconductor wafer and an electronic test system. The probe card is put into equipment called a wafer prober, inside which the position of the wafer to be tested is manipulated so that there is a precise contact between each probe tip and I/O pad on the wafer.

   While the rapid progress of scaling and highly integration including 3D/TSV, conventional probe card technology has already reached the limit of its array pitch and configuration. There is no single method covering the wide range of probe card technologies in the marketplace as stated in the ITRS, so leading different technologies such as “cantilever type,” “vertical type,” and “MEMS type” is shared depending on the test categories. Probe card structure is constantly becoming more complicated in the progress of device scaling and highly integration, so the interface cost including probe cards will be also increasing year by year.

   Probe card technologies are facing complex electrical, mechanical, and economical challenges driven by product specifications, test requirements, and reduced test cost demands. Research and development of cost effective probe card technologies is urgently required to meet the rapid progress and variety of test applications in the semiconductor industry.

Features and Advantages of Our Probe Cards

   Our new method, “AMMECS,” is a combination of a probe unit architecture called “Gun-Kimo Probe,” which provides a solution for fine-pitch probe arrangements for testing 2.5D/3D ICs with TSV stacking and parallelism of high-end ICs, and “Gun-Kimo Card,” which provides a solution for dense and multi-layered wiring problems. Combining breakthroughs in precision probe technology and interconnect technology, as well as wiring technology, our AMMECS probe cards can provide a number of benefits that are unattainable in the conventional probe cards. We introduce a wide variety of following solutions:

1. High-pin-count and fine-pitch needles in a single sheet

   This method is our basic probe architecture, which is a set of hundreds of contact needles and terminals fabricated by laser processing, using a heat-treated Be-Cu thin material. In many conventional cases, each probe needle is hand built by highly skilled technician. In contrast, we achieved the method that is free from conventional “a-needle-as-a-part” manufacturing and manual assembly like cantilever probe, in other words, simultaneous process of massive needle fabrication and precision assembly for a row of I/O pads.

   This sheet-structural probe has a compatibility with batch-process of multi-needles, patterning to circuits and insulation coating, and easiness to compose a multi-layered probe patterning with ground layers for high frequency, for example, impedance-matching probe sheet with strip-line or micro-strip-line structure, and probe sheet with guard structure for low leakage current.

Basic structure

2. Precise Tip Motion Parameter Controllable Structure

   Three important probe-tip motion parameters are “contact force,” “overdrive” and “scrub motion” to determine probe contact characteristics. It is very important to design an optimal set of these three parameters for probing certain device types. But in case of cantilever probe, the three parameters are determined depending on its probe arm design. A basic cantilever form design of a horizontal long beam and vertical needle makes a correlation among these three parameters. So the resulting excessive contact force or scrub motion leads to a die damage or contamination from pads/bumps.

   Our probes are produced by 2D laser process of a thin Be-Cu film, which enables any complicated curves to meet optimal probe shape. So we can set up each parameter independently. This probe technology provides following advantages:

  • Small or non-scrub motion with large overdrive design for small-area and ultra-fine pitch pad/bump,
  • Small or non-scrub motion design for contamination-free probing preventing online tip-cleaning,
  • More than 100 um large overdrive for large area probing of 300-450mm wafer contact.
3. A Combination of Probe Sheets meets Universal Assembly

   Recent semiconductor market trend, such as highly integration and scaling of device, parallelism, and 3D-stacked ICs, increases the number of I/O pads for testing and makes pad arrangement more complicated. The number of pads and the pad arrangements influence probe arrangements.

   For example, memory ICs generally have simple dual line pad arrangements, though it requires entire simultaneous die testing on a wafer. This necessitates a high-pin-count probe design with several tens of thousands of pins. On the other hand, LCD driver ICs have more precise pad arrangements as a number of pixels increase, and it has a very fine pitch of less than 15 um as well as a small pad size. Furthermore, to enable more functionality in smaller packages, manufacture trend is moving toward 3D-stacked ICs with TSV technology. Ultra-fine-pitch area array probes of less than 50 um are required for direct TSV probing.

   However, nowadays, there is no single probe technology to meet a wide variety of pad arrays. Using our method, a certain row is composed by multi-probe needles in a single sheet, and columns are composed by multiple probe sheets arranged repeatedly in parallel. So the basic architecture of our probe head assembly is fine-pitch area-array. And this basic architecture has extensibility to fine-pitch peripheral or parallelism.

   This probe technology meets a wide variety of geometrical requirements across the entire device category with a single manufacturing method.

4. Cu-wiring System and Micro-connection technology

   A probe card trend of the continued increase in pin count and decrease in pad pitch is driving high cost of multi-layered (several tens of layers) PCBs or multi-layered ceramic interposers, and difficult connection technique between fine-pitch probe needles and circuit patterns.

   We have challenged a method of direct Cu-wiring from probe terminals to tester interface terminals on a low-layered PCB surface, aiming free from high multi-layered PCB. The direct Cu-wiring method has lower resistance and higher cross talk characteristic than print and etch line in PCB. Furthermore, in order to realize a cost-effective direct Cu-wiring manufacturing method, we have developed our own automatic wiring system and z-directional direct connection between probe terminals and wire edges or circuit pads.

 5. PA’s own standardizing Automatic Design and Manufacturing Systems

   Drastic design and manufacturing automation is also one of our R&D policies. We have always been researching automated facilities while being associated with the probe architecture. By implementing automatic design and manufacturing processes, ProbeAce has the capability to offer quick turnaround to the market. Our automated design and facilities are as follows:

  • Automatic Place-and-Route Design from probe terminals to tester interface terminals,
  • Automatic Probe Fabrication System, basically featuring position control with image processing and laser processing technology,
  • Automatic Probe Assembly System, which enables automatic precision alignment of probe sheets with a certain pitch, especially for high-pin-count area array probe assembly,
  • Automatic Wiring System, which enables automatic Cu-wiring from probe terminals to tester interface terminals on a basic PCB.

These automated systems can lead to some advantages:

  • Quick turnaround from input of customer’s spec to output of PA’s proposal spec,
  • Capability to offer quick turnaround of first trial probe card to customers,
  • Cost-effective, short Time-to-Market and high-quality manufacturing without manual handling.

Probe fabrication system  Probe assy system  Cu wiring system



株式会社プロブエースは、1999年の設立以来、次世代のプローブカードを実現するための独自で斬新な方法論を追及してまいりました。次世代用プローブカードの必要性は、10年以上前から半導体業界で求められてきましたが、緊急課題であるにもかかわらず決定的な方法論が見出せないままでした。このAdvanced Probe Cardを実現するため、プロブエースは新たな方法論を提唱し、これをAMMECS(Advanced Micro-Mechanical・Electrical・Chemical・System)と命名しました。






我々の新しい方法論であるAMMECSは、2.5D/3D TSVや高機能ICの検査に適用可能な狭ピッチプローブ配列のソリューションを提供するプローブユニット構造としての”Gun-Kimo Probe”と、高密度・多層配線に対するソリューションを提供する”Gun-Kimo Card”から構成されます。精密プローブ技術と、配線技術に加えてコネクション技術におけるブレークスルーを結合させることにより、AMMECSプローブカードは、従来品では困難であった多くの利益を供給できます。以下に、様々なソリューションをご紹介します。







  • 狭小・狭ピッチパッドに適応可能な、十分なオーバードライブでの極小又はノンスクラブ動作
  • 先端クリーニングを不要とする、ゴミを発生しない極小又はノンスクラブプローブ動作
  • 300 mm又は450 mm径ウェハコンタクト等の広域プロービングに適した、100 um超の大オーバードライブ



例えばメモリICでは、一般的にシンプルな直線配列パッドですが、ウェハ上での多くのチップの同時測定が要求されます。この測定のためには、数万ピンも搭載したプローブカードが必要となります。一方、液晶画面駆動用ICでは、画素数の増加に伴いより精密なパッド配列となり、パッド面積の縮小化と共に15umを下回る狭ピッチな配列が要求されます。また、小パッケージ下でのさらなる高機能化のために、半導体製造のトレンドは確実にTSV技術を用いた三次元積層組立の方向に向かっています。TSVへの直接プロービングのためには、50 umピッチを下回るエリア配列プローブが要求されます。








  • プローブ端子からテスターインタフェース端子までの配置配線設計の自動化
  • 画像処理による位置制御及びレーザ加工技術を特徴とする自動プローブ製造システム
  • 複数プローブシートの一定ピッチでの高精度自動整列を可能とする自動プローブ組立装置(主として多ピンエリアアレイプローブ組立用)
  • PCB上でのプローブ端子からテスターインタフェース端子までの銅ワイヤ自動配線を可能とする自動配線装置


  • 客先仕様入手からPA仕様プロポーザル提出までの短納期化
  • 第1試作機の客先供給までの短納期化
  • マニュアル作業を排除した低コスト、短納期で高品質な製造